This invention relates to a parallel digital computer architecture and more particularly, to a computer for performing programs digitally but in the format of an analog computer.
Analog and hybrid computers have been the traditional tools for performing real-time simulations of body or structural dynamics. Nevertheless, many attributes of the digital computer make it an appealing substitute for the analog or hybrid forms, when the capabilities of the digital computer and the nature of simulation admit. The fundamental deficiency of the conventional digital computer architecture, in the performance of time related simulations, resides in the cycle time. Since time dependent simulations in such digital computers require repeated looping or cycling through the program, the highest simulation frequency attainable is severely constrained by both the complexity of the simulation and the cycle time of the digital computer. Furthermore, it is nearly impossible to overcome this deficiency by dividing a single real-time problem into subprograms of controlled computation time, because the variable interval integration algorithms used vary in processing time from cycle to cycle. Thus, it may generally be said that the art of real-time simulation in conventional architecture digital computer systems will be severely limited by the cycle speed of available and foreseeable digital computers. On the other hand, complex simulations at other than real-time can be divided into smaller elements to reduce the running time of conventional digital computers. One such approach is taught in U.S. Pat. No. 3,346,851 issued to J. E. Thornton et al.